LOGICAL ORGANIZATION OF COMPUTER II

LESSON PLAN Name of the faculty:

Antim Panghal

Discipline:

BCA

Semester:

2nd semester

Subject:

LOGICAL ORGANIZATION OF COMPUTER-II

Lesson plan Duration:

15 weeks (from January,2018 to April,2018)

**Work load(Lecture /Practical) per week (in hours): WEEK

1st

THEORY Topic (including assignment/test) SECTION -A

Lecture day 1st

Sequential logic:  Introduction & Characteristics

2nd

3rd

4th

1|Page

2nd



Introduction of Boolean functions

3rd



Clocked RS Flip-Flops

4th



State table, state diagram & state equation of RS flip-flop

5th



D Flip-Flops

6th



State table, state diagram & state equation of D flip-flop

7th



JK Flip-Flops

8th



State table, state diagram & state equation of JK flip-flop

9th



T Flip-Flops

10th



State table, state diagram & state equation of T flip-flop

11th



Master-Slave Flip-Flops

12th



State table, state diagram & state equation of Master Slave flip-flop

13th



Excitation Table: Clocked RS &D flip flops

14th



Excitation Table: T & JK flip flops

15th



Question paper discussion

16th

SECTION -B Sequential Circuits:  Serial Input Serial Output (SISO)

5th

6th

7th

8th

17th



Serial Input Serial Output (SISO) cont.

18th



Serial Input Parallel Output (SIPO)

19th



Serial Input Parallel Output (SIPO) cont.

20th



Parallel Input Serial Output (PISO)

21st



Parallel Input Serial Output (PISO) cont.

22nd



Parallel Input Parallel Output (PIPO)

23rd



Parallel Input Parallel Output (PIPO) cont.

24th



Shift Register

25th



Designing counters – Asynchronous Binary Counters Introduction

26th



Modulo-N counter (Asynchronous Binary Counters)

27th



Modulo-N counter (Asynchronous Binary Counters) cont.

28th



Designing counters – Synchronous Binary Counters Introduction

29th



Modulo-N counter (Synchronous Binary Counters)

30th



Modulo-N counter (Synchronous Binary Counters) cont.

31st



Up-Down Counters

32nd



Question paper discussion

9th 33rd

2|Page

SECTION -C Memory & I/O Devices:  Introduction, Memory Parameters

34th



Semiconductor devices: RAM

35th



Semiconductor devices: ROM

10th

11th

36th



Optical Storage devices

37th



Optical Storage devices cont.

38th



Magnetic Storage devices

39th



Magnetic Storage devices cont.

40th



Memory (Cache & Virtual memory) &Flash memory

41st



I/O Devices

42nd



I/O Devices cont.

43rd



I/O Controllers

44th



Test of section-c

12th

SECTION -D 45th

13th

46th



Instruction set selection

47th



Instruction cycle

48th



Instruction Format

49th



Instruction Format cont.

50th



Addressing Modes

51st



Addressing Modes cont.

52nd 14th

15th

3|Page

Instruction Design:  Machine instruction

I/O Organization:  I/O Interface

53rd



Interrupt structure

54th



Interrupt structure cont.

55th



Program-controlled transfer

56th



DMA transfer

57th



IOP

58th



I/O Channels

59th



Test of section-D

60th

4|Page

Question paper discussion